168/E double processor system for fastbus data aquisition

Abstract The system described is designed to work in Fastbus data aquisition setups as a fast on-line computer and intermediate mass storage. Its main components are two 168/E IBM 370 emulators, an extra 2–4 Mbyte buffer memory, a supervising microprocessor controlled interface linking all components together, and a special Fastbus-168/E interface to both processors, allowing transfer times up to 40 Mbytes/s. Processed and buffered event data are sent to the host computer by means of a CAMAC or Unibus port.