A scheme for the HPC second-level trigger

Tiziano Camporesi,F. R. Cavallo,C. Chiccoli,G. Gamberini,P Giusti,F. L. Navarria,P. Pasini,P. Privitera,T. Rovelli

A scheme for the HPC second-level trigger

1989

Tiziano Camporesi
F. R. Cavallo
C. Chiccoli
G. Gamberini
P Giusti
F. L. Navarria
P. Pasini
P. Privitera
T. Rovelli

Abstract The general architecture of the HPC second-level trigger is described, and an implementation based on digital sums of the drifted charge is discussed. The tests of a Camac prototype are reported.

Keywords:

Computer Automated Measurement and Control
Architecture
Nuclear magnetic resonance
Electronic engineering
Physics
Computer hardware
level trigger
Optics

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