A method for manufacturing an integrated complementary metal oxide semiconductor circuit using a raised source-drains and a replacement metal gates
2006
A method, comprising: Forming a dummy gate electrode (104) via a PMOS-side (10a) of a complementary structure shall; Covering the dummy gate electrode (104) with a nitride etch stop layer (120); Covering the gate electrode via an NMOS-side (10b) with a nitride etch stop layer; Removing a portion of the nitride etch stop layer on the PMOS side (10a), while the etching stopper layer is left on the NMOS side (10b); Removing the dummy gate electrode (104) and replacing the dummy gate electrode (104) by a metal gate electrode (115) and Forming an epitaxial p-type source-drain (40) on the PMOS side (10a).
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