Application of guard traces with vias in the RF PCB layout

In this paper we discuss the effect of the guard traces with vias on the function of the parallel double microstrip lines in the PCB layout. The structure of the parallel double microstrip line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed; from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.