Stacked semiconductor wafer arrangement and method of producing a through-hole and an electrically conductive connection by a stacked semiconductor wafer assembly

A process to produce a through-hole by a stacked semiconductor wafer assembly comprising: a first semiconductor wafer (110) having a first surface (112), a dielectric material which is exposed at the first surface (112) and metallic structures (115) that are exposed at the first surface (112) and extending from the dielectric material; a second semiconductor wafer (150) having a second surface (114), a semiconductor material that is exposed at the second surface (114) and metallic patterns (155) are exposed at the second surface (114) and away from the semiconductor material protruding, wherein the second surface (114) of the first surface (112) faces and the metallic structures (115) of the second semiconductor wafer (150) with the metallic structures (155) of the first semiconductor wafer (110) are combined, and a gap ( 195) in the interface region between the adjacent facing first and second surfaces (112, 114) exist, the method comprising: a) etching a hole (200) which extends (through the first wafer 110) and (through the gap 195) extends to the second surface (114) of the second wafer (150) is partially exposed, wherein the hole (200) has a first wall (210) extending in the vertical direction (212) and a second wall (215), the inwardly with an inclination of the first wall (210) to an inner opening (192) in the first surface (112) leaves, wherein the second surface (114) through the inner opening (192) is exposed; b) line of particles in the hole (200) and sputtering of semiconductor material (400) of at least one of ...