Simple current and capacitance methods for bulk finFET height extraction and correlation to device variability

FinFET devices are expected to be appropriate candidates for further scaling down logic devices while maintaining short-channel effects under control [1] [2] [3]. In this work, two different characterization methods are used to evaluate the impact of device characteristic dimensions such as the fin height and width on variability and performance. Both techniques can accurately predict the physical dimensions but the current-based method was shown to be more in line with the actual physical profiles. The results have been validated by cross-sectional transmission electron microscopy (TEM), confirming the within wafer variations.