Effects of the On-Die Decoupling Capacitors on the EME Performance in 28 nm FD-SOI Technology

A dedicated test chip has been designed in order to support the study of the EMC performance, and more specifically the Conducted Emission, of a microcontroller family in M28 FDSOI technology. The focus in designing the test chip has been put on the on-die decoupling capacitors, in particular on the topology of the placement as well as the capacitance amount.