Thermally robust nickel silicide process for nano-scale CMOS technology : Fundamental and application of advanced semiconductor devices

A novel NiSi technology with bi-layer Co/TiN structure as a capping layer is proposed for the highly thermal immune Ni Silicide technology. Much better thermal immunity of Ni Silicide was certified up to 700°C, 30 min post silicidation furnace annealing by introducing Co/TiN bi-layer capping. The proposed structure is successfully applied to nano-scale CMOSFET with a gate length of 80 nm. The sheet resistance of nano-scale gate poly shows little degradation even after the high temperature furnace annealing of 650°C, 30 min. The Ni/Co/TiN structure is very promising for the nano-scale MOSFET technology which needs the ultra shallow junction and high temperature post silicidation processes.