A CMOS 8-bit 20MHz two-step parallel A/D converter with 95mW power consumption
1988
The need for a low-cost, high-speed A/D converter with low power consumption is growing as digital video-signal processing applications in the consumer electronics field increase. Although a flash ADC offers a sufficiently high conversion rate for video applications, it has a high power consumption because of its large number of comparators. The two-step parallel ADC, on the other hand, has significantly fewer comparators, and thus a lower power consumption and, because its chip size is smaller, it can be made at lower cost. A conventional two-step parallel ADC has, however, three problems: a relatively slow conversion rate, a relatively poor differential linearity, and the need for a peripheral sample-and-hold circuit. The authors report a new 8-bit two-step parallel ADC which solves these problems. >
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