A new step in GeOI pFET scaling and Off-State current reduction: 30nm gate length and record I ON /I OFF ratio

Recent advances in terms of performance and scalability of Gechannel pFETs have been reported [1]-[9], confirming Germanium as a serious contender to Silicon for future high performance devices. Significant efforts in terms of material quality have led to reduced I OFF currents [1], [3], [4]. However, in Ge-On-Si substrates, an important part of the Off-State Drain current remains due to bulk leakage [3]. Regarding the GeOI option [1],[6]-[8] I OFF was so far limited by defects arising from the Ge/BOx interface, degrading the minority carriers lifetimes and inducing a parasitic conduction of the back-channel [10]. It was recently shown that the I ON /I OFF ratio could dramatically be improved in a Gate-All-Around Ge-channel device (L g =1.3µm) [4]. In this work, thanks to recent developments in the Ge enrichment process [11]-[14], we reduced the defectivity of Germanium while decreasing the Ge film thickness to 25nm. The fabricated High-κ/Metal Gate pFETs exhibit controlled V th and SCE, thus maintaining an excellent I ON /I OFF ratio at more than 10 5 down to L g =55nm (DIBL=140mV/V). Functional transistors were obtained for gate lengths as small as 30nm, which are the shortest reported so far in the literature (ref.[2]: L g =60nm). The resolution of the I OFF issue in planar Ge pFETs opens new perspectives for HP applications.