Solid State X-Ray Lithography Breaks the Submicrometer Barrier

A testing circuit arrangement repetitively stores voltages representative of the peak values of adjacent half cycles of an alternating testing signal and compares each newly stored peak value with a predetermined fraction of the stored immediately preceding peak value (of the opposite polarity). The voltage associated with the longer stored peak value is cleared after each comparison has been made and before the next peak value of that polarity occurs; and if a fall in successive peak values, by the predetermined fraction, has occurred at the time when the stored voltage is cleared, the test is halted.