Advantages of Ultra-Thin SIMOX/CMOS based on Well-Established 0.8 µm Mass-Production Technologies for Low Power 1 V Phase Locked Loop Circuits

This paper describes the various advantages of silicon on insulator (SOI) circuits when well-established 0.8 µm Complementary Metal Oxide Semiconductor (CMOS) mass-production technologies for ultra-low power 1 V phase locked loop (PLL) circuits are applied. From experiments on circuit operation, a parasitic capacitance of SOI is estimated about 20% reduced to bulk, and it is found that the most prominent advantage of SOI is 80% faster operation than bulk at low supply voltage due to less drain capacitance and less short channel effects of p-channel MOS field effect transistor (pMOSFET).