Post-packaging auto repair techniques for fast row cycle embedded DRAM

A test flow using a auto repair technique has also been proposed. It assumes a conventional wafer testing, but puts much weight on the post-package test by utilizing the proposed auto repair technique. This is implemented in a 36 Mb embedded DRAM macro of 6ns cycle time. It consists of internal compare circuit, redundancy analyzer, and anti-fuses. The internal auto programming of anti-fuse fixes post-packaging failures that might appear by final at-speed test and contributes to yield improvement.