CMOS-Integrated Low-Noise Junction Field-Effect Transistors for Bioelectronic Applications

In this letter, we present a CMOS-integrated low noise junction field-effect transistor (JFET) developed in a standard 0.18 $\mu \text{m}$ CMOS process. These JFETs reduce input referred flicker noise power by more than a factor of 10 when compared with equally sized n-channel MOS devices by eliminating oxide interfaces in contact with the channel. We show that this improvement in device performance translates into a factor-of-10 reduction in the input-referred noise of integrated CMOS operational amplifiers when JFET devices are used at the input, significant for many applications in bioelectronics.