Normally-off trench JFET technology in 4H silicon carbide

A double gate normally-off silicon carbide (SiC) trench junction field effect transistors (JFET) design is considered. Innovative migration enhanced embedded epitaxial (ME^3) growth process was developed to replace the implantation process and realize high device performance. Strong anisotropic behavior in electrical characteristics of the pn junction fabricated on (11-20) and (1-100) trench a-planes was observed, although quality of the pn diodes was found to be independent of trench plane orientations. Fabricated normally-off trench 4H-SiC JFET demonstrates the potential for lower specific on-resistance (R"o"n"S) in the range of [email protected]^2 (1200V class). A relative high T^-^2^.^6 dependence of R"o"n"S is observed. A breakdown voltage of 400V in the avalanche mode was confirmed at zero gate bias conditions for cell design without edge termination. It was demonstrated that the normally-off JFETs are suitable for high temperature applications. Average temperature coefficient of threshold voltage (V"t"h) was calculated as -1.8mV/^oC, which is close to the MOS based Si power devices.