Semiconductor device and mfg. method thereof

The present invention relates to a manufacturing method and a semiconductor period. The dielectric layer (12) and a first HSQ layer (14) formed on the semiconductor substrate is formed on the interconnect trench, and Group tantalum barrier metal layer 24a over the entire substrate. Then, a copper-containing metal seed layer (60) and the electroplated copper layer (62) to fill the portion of the interconnect channel. Thereafter, a bias sputtering copper-containing metal layer (64) on the plated copper layer (62), to fill the remainder of the interconnection trench, and then subjected to heat treatment. As a result, the dissimilar metal contained in the bias sputtered copper-containing metal layer (64) uniformly diffused into the copper electroplating layer 62.