(Invited) The Assessment of Border Traps in High-Mobility Channel Materials

The assessment of border traps in the gate stack of so-called high-mobility material MOSFETs by low-frequency (1/f) noise spectroscopy is described. In a first part, the theoretical basis of the method is given, with special emphasis on the role of inelastic tunneling in the capture process. It is shown that depending on the energy barrier for capture, the real tunneling depth corresponding with a certain noise frequency f may be smaller compared with the elastic tunneling limit. In a second part, the border trap behavior in Ge n- and pMOSFETs with different gate stacks is discussed. Finally, the impact of the surface passivation and pre- and post Al2O3 deposition treatments on the 1/f noise of InGaAs-based nMOSFETs will be outlined.