Quantitative analysis on Cu diffusion through TaN barrier metal and the device degradation by using two-level Cu-interconnects implemented 0.25 /spl mu/m-256 Mbit DRAMs

To evaluate Cu diffusion in a practically used damascene structure, plasma-enhanced CVD-SiO/sub 2/ (p-SiO/sub 2/) layer with trench test structure was used, and trace Cu diffusion into the p-SiO/sub 2/ trench through TaN barrier metal was quantified by precise chemical analysis for the first time. In the trench structure, the diffused Cu amount was 2 orders of magnitude larger than that in the blanket structure. This increase in the trench structure has been well explained by the obtained Cu diffusion coefficient in TaN and the TaN step coverage at the trench sidewall. Two-level Cu interconnects have been implemented for the 0.25 /spl mu/m 256 M bit-DRAM, and the retention time decrease after annealing has been examined in related to Cu diffusion. The result suggested the possibility that the Cu in the ILD on the order of 10/sup 16/ atoms/cm/sup 3/ affected the DRAM cell function.