Influence of p‐InP buffer layers on submicron InGaAs/InP junction field‐effect transistors

Strong carrier confinement in the active region of field‐effect transistors is important for submicron devices. It is shown that in InGaAs junction field‐effect transistors (JFETs) the introduction of a p‐type InP buffer layer with high p‐type dopant concentration (NA=2×1017 cm−3) supresses short‐channel effects even in the submicron gate regime. By lowering the p‐type concentration below 1017 cm−3 and reducing the thickness of the buffer layer, higher output conductances, threshold voltage shifts, and worse pinch‐off behavior result especially at shorter gate lengths. InGaAs JFETs without a buffer layer exhibit tremendous short‐channel effects. It is concluded that high potential barriers at the channel substrate heterointerface are necessary for control of InGaAs JFET performance over a wide range of gate length.