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Robert M. Ellis
Robert M. Ellis
Intel
Parallel computing
Computer science
Dram
Electronic engineering
CAS latency
3
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12
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0
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A 3.6-Gb/s point-to-point heterogeneous-voltage-capable DRAM interface for capacity-scalable memory subsystems
2004
ISSCC | International Solid-State Circuits Conference
J. Kennedy
Robert M. Ellis
James E. Jaussi
Randy Mooney
S. Borkar
Jung-Hwan Choi
Jae-Kwan Kim
Chan-Kyong Kim
Woo-Seop Kim
Chang-Hyun Kim
Soo-In Cho
Steffen Loeffler
Jochen Hoffmann
Wolfgang Hokenmaier
R. Houghton
Thomas Vogelsang
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Citations (11)
11.8 A 2Gb/s Point-to-Point Heterogeneous Voltage Capable DRAM Interface for Capacity-Scalable
2004
IEEE Journal of Solid-state Circuits
Memory Subsystems
Joseph T. Kennedy
Robert M. Ellis
James E. Jaussi
Randy Mooney
Shekhar Borkar
Jung-Hwan Choi
Jae-Kwan Kim
Chan-Kyong Kim
Woo-Seop Kim
Chang-Hyun Kim
Soo-In Cho
Steffen Loeffler
Jochen Hoffmann
Wolfgang Hokenmaier
Russ Houghton
Thomas Vogelsang
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Citations (1)
Method and apparatus for multiple rows cache per bank
2004
John B. Halbert
Robert M. Ellis
Kuljit S. Bains
Chris B. Freeman
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