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Siva Narendra
Siva Narendra
Intel
Leakage (electronics)
Transistor
Electronic engineering
CMOS
Short-channel effect
4
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Benefits and barriers for probabilistic design
2010
ASP-DAC | Asia and South Pacific Design Automation Conference
Siva Narendra
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Transistor Design to Reduce Leakage
2006
S. Suthram
Siva Narendra
Scott E. Thompson
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Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation
2004
ISLPED | International Symposium on Low Power Electronics and Design
Gerhard Schrom
Peter Hazucha
Jae Hong Hahn
Volkan Kursun
Donald Gardner
Siva Narendra
Tanay Karnik
Vivek De
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Temperature and process invariant MOS-based reference current generation circuits for sub-1V operation
2003
ISLPED | International Symposium on Low Power Electronics and Design
Stephen Tang
Siva Narendra
Vivek De
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