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Iype P. Joseph
Iype P. Joseph
Amrita Vishwa Vidyapeetham
Parallel computing
Verilog
Computer science
Computer architecture
Cryptographic protocol
2
Papers
18
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Reconfigurable Cryptographic Processor for multiple crypto-algorithms
2011
TechSym | IEEE Students’ Technology Symposium
Rajesh Kannan Megalingam
Iype P. Joseph
Popuri Gautham
Ravishankar Parthasarathy
Kb Deepu
Mithun Muralidharan Nair
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Citations (4)
Phased set associative cache design for reduced power consumption
2009
CSIT | IEEE International Conference on Computer Science and Information Technology
Rajesh Kannan Megalingam
Kb Deepu
Iype P. Joseph
Vandana Vikram
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Citations (14)
1