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Priya Wali
Priya Wali
Intel
CMOS
SerDes
Jitter
Phase-locked loop
Physics
3
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A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications
2021
IEEE Journal of Solid-state Circuits
Dongseok Shin
Hyung Seok Kim
Chuan-chang Liu
Priya Wali
Savyasaachi Keshava Murthy
Yongping Fan
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A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET
2021
IEEE Journal of Solid-state Circuits
Jihwan Kim
Sandipan Kundu
Ajay Balankutty
Matthew Beach
Bong Chan Kim
Stephen Kim
Yutao Liu
Savyasaachi Keshava Murthy
Priya Wali
Kai Yu
Hyung Seok Kim
Chuan-chang Liu
Dongseok Shin
Ariel Cohen
Yoav Segal
Yongping Fan
Peng Li
Frank OMahony
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A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS
2021
VLSIC | Symposium on VLSI Circuits
Shiva Kiran
Ajay Balankutty
Yutao Liu
Rajeev K. Dokania
Hariprasath Venkataraman
Priya Wali
Stephen Kim
Yoel Krupnik
Ariel Cohen
Frank OMahony
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