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Eskinder Hailu
Eskinder Hailu
IBM
Electronic engineering
Computer science
Phase-locked loop
Electrical engineering
Jitter
4
Papers
29
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A Circuit for Reducing Large Transient Current Effects on Processor Power Grids
2006
ISSCC | International Solid-State Circuits Conference
Eskinder Hailu
David William Boerstler
K. Miki
Jieming Qi
M. Wang
Mack W. Riley
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Citations (22)
A 10+ GHz low jitter wide band PLL in 90 nm PD SOI CMOS technology
2004
VLSIC | Symposium on VLSI Circuits
David William Boerstler
Kazuhiko Miki
Eskinder Hailu
Hiroki Kihara
Eric John Lukes
J. Peter
S. Pettengill
Jieming Qi
James David Strom
Munehiro Yoshida
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Citations (7)
A Background Optimization Method for PLL by Measuring Phase
2004
G Taylor
David William Boerstler
Kazuhiko Miki
Eskinder Hailu
Hiroki Kihara
Eric John Lukes
S. Pettengill
Jieming Qi
James David Strom
Munehiro Yoshida
Toshiba America
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