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Richard W. Foote
Richard W. Foote
National Semiconductor
Shallow trench isolation
Electronic engineering
Silicon on insulator
Oxide
Electrical engineering
2
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1
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Physical modeling and alleviation of shallow-trench-isolation charging effects in silicon-on-insulator complementary bipolar technology
2004
BCTM | Bipolar/BiCMOS Circuits and Technology Meeting
Wipawan Yindeepol
Richard W. Foote
J. De Santis
Tracey Krakowski
C. Bulucea
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Impact of buried layer processing on gate oxide integrity [CMOS processing]
2004
IIRW | International Integrated Reliability Workshop
Barry O'Connell
R. Yang
Wipawan Yindeepol
J. De Santis
Andy Strachan
William M. Coppock
Richard W. Foote
Charles A. Dark
Prochy Sethna
Prasad Chaparala
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