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Ashwin Raghunathan
Ashwin Raghunathan
University of Texas at Austin
Electronic engineering
Computer science
Design for testing
Real-time computing
Chip
4
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81
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A Sub-100 Fs RMSjitter 20 GHz Fractional-N Analog PLL With a BAW Resonator Based On-Chip 2.5 GHz Reference.
2022
IEEE J. Solid State Circuits
Sachin Kalia
Salvatore Finocchiaro
Tolga Dinc
Bichoy Bahr
Ashwin Raghunathan
Gerd Schuppener
Siraj Akhtar
Tobias Fritz
Baher Haroun
Benjamin Cook
Swaminathan Sankaran
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On-Chip Delay Measurement Based Response Analysis for Timing Characterization
2010
Journal of Electronic Testing
Ramyanshu Datta
Antony Sebastine
Ashwin Raghunathan
Gary D. Carpenter
Kevin J. Nowka
Jacob A. Abraham
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On-chip delay measurement for silicon debug
2004
GLSVLSI | Great Lakes Symposium on VLSI
Ramyanshu Datta
Antony Sebastine
Ashwin Raghunathan
Jacob A. Abraham
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Citations (54)
Quasi-oscillation based test for improved prediction of analog performance parameters
2004
ITC | International Test Conference
Ashwin Raghunathan
Ji Hwan Chun
Jacob A. Abraham
Abhijit Chatterjee
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Citations (21)
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