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Radhakrishnan Sithanandam
Radhakrishnan Sithanandam
Samsung
Electronic engineering
Silicon on insulator
Technology CAD
CMOS
Logic gate
3
Papers
8
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Technology Scaling of ESD Devices in State of the Art FinFET Technologies
2020
CICC | Custom Integrated Circuits Conference
Suk-Jin Kim
Radhakrishnan Sithanandam
Woo-Jin Seo
Mijin Lee
Sangyoung Cho
Juho Park
Hyukhoon Kwon
Nam Ho Kim
Chan-Hee Jeon
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Citations (1)
Unexpected Latchup Risk Observed in FDSOI Technology – Analysis and Prevention Techniques
2018
EOS/ESD | Electrical Overstress/Electrostatic Discharge Symposium
Radhakrishnan Sithanandam
Chan-Hee Jeon
Ki-Tae Lee
Woo-Jin Seo
Kwanjae Song
Yiseul Kim
Jordan Davis
Dong-Yup Lee
Suk-Jin Kim
Han Gu Kim
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A New On-Chip ESD Strategy Using TFETs-TCAD Based Device and Network Simulations
2018
IEEE Journal of the Electron Devices Society
Radhakrishnan Sithanandam
Mamidala Jagadesh Kumar
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Citations (6)
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