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P Kulkarni Jaydeep
P Kulkarni Jaydeep
Electronic engineering
Computer science
Electrical engineering
Systems engineering
2
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適応電圧スケーリングと動的パワーゲーティングを用いた22nmグラフィックス実行コアにおけるポストシリコン電圧ガードバンド削減【Powered by NICT】
2017
IEEE Journal of Solid-state Circuits
Cho Minki
T Kim Stephen
Tokunaga Carlos
Augustine Charles
P Kulkarni Jaydeep
Ravichandran Krishnan
W Tschanz James
M Khellah Muhammad
De Vivek
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14nm FinFET CMOS技術における電荷共有ビット線と不斉センス増幅器を用いた小信号検出を利用した560mV~5.6Mb/mm~2 1R1W8T SRAMアレイ動作【Powered by NICT】
2017
IEEE Journal of Solid-state Circuits
P Kulkarni Jaydeep
Keane John
Koo Kyung-Hoae
Nalam Satyanand
Guo Zheng
Karl Eric
Zhang Kevin
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