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Kazuhiro Mizutani

Fujitsu

4

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Development of cylindrical stacked cell for 256Mbit DRAMs

1996
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A 150 ns 16-Mb CMOS SRAM with interdigitated bit-line architecture

1992 IEEE Journal of Solid-state Circuits
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A 15 ns 16 Mb CMOS SRAM with reduced voltage amplitude data bus

1992 ISSCC | International Solid-State Circuits Conference
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