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Qubo Hu

Norwegian University of Science and Technology

10

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88

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Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications

2008 SiPS | Signal Processing Systems
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Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications

2008 SiPS | Signal Processing Systems
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Fast memory footprint estimation based on maximal dependency vector calculation

2007 DATE | Design, Automation, and Test in Europe
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Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems

2007 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Incremental hierarchical memory size estimation for steering of loop transformations

2007 ACM Transactions on Design Automation of Electronic Systems
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Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applications

2006 ASP-DAC | Asia and South Pacific Design Automation Conference
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Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applications

2006 ASP-DAC | Asia and South Pacific Design Automation Conference
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Polyhedral space generation and memory estimation from interface and memory models of real-time video systems

2006 Journal of Systems and Software
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Memory requirement optimization with loop fusion and loop shifting

2004 DSD | Digital Systems Design
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Memory hierarchy usage estimation for global loop transformations

2004 NORCHIP | NORCHIP
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Citations (2)