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Jiajun Wu
Jiajun Wu
Huazhong University of Science and Technology
Computer science
Efficient energy use
Processor design
Field-programmable gate array
Artificial neural network
3
Papers
1
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0
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An Energy-efficient Deep Belief Network Processor Based on Heterogeneous Multi-core Architecture with Transposable Memory and On-chip Learning
2021
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Jiajun Wu
Xuan Huang
Le Yang
Jipeng Wang
Bingqiang Liu
Ziyuan Wen
Juhui Li
Guoyi Yu
Kwen-Siong Chong
Chao Wang
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In Situ Aging-Aware Error Monitoring Scheme for IMPLY-Based Memristive Computing-in-Memory Systems
2021
IEEE Transactions on Circuits and Systems I-regular Papers
Jiarui Xu
Yi Zhan
Yujie Li
Jiajun Wu
Xinglong Ji
Guoyi Yu
Wenyu Jiang
Rong Zhao
Chao Wang
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An Energy-efficient Multi-core Restricted Boltzmann Machine Processor with On-chip Bio-plausible Learning and Reconfigurable Sparsity
2020
A-SSCC | Asian Solid-State Circuits Conference
Jiajun Wu
Xuan Huang
Le Yang
Liang Wang
Jipeng Wang
Zuozhu Liu
Kwen-Siong Chong
Shaowei Lin
Chao Wang
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