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Hyeongjun Ko

Seoul National University

8

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19

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A 3.2 GHz Quadrature Error Corrector for DRAM Transmitters, using Replica Serializers and Pulse-Shrinking Delay Lines

2020
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A 12.8-Gb/s Quarter-Rate Transmitter Using a 4:1 Overlapped Multiplexing Driver Combined With an Adaptive Clock Phase Aligner

2019 IEEE Transactions on Circuits and Systems Ii-express Briefs
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A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation

2019 ISCAS | International Symposium on Circuits and Systems
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A 1.74mW/GHz 0.11–2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllers

2015 A-SSCC | Asian Solid-State Circuits Conference
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