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Keiichi Hirano

Tohoku University

4

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Evaluation of Shared DRAM for Parallel Processor System with Shared Memory (Special Section on VLSI Design and CAD Algorithms)

1998 IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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Multi-chip module with optical interconnection for parallel processor system

1998 ISSCC | International Solid-State Circuits Conference
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A New Three-Dimensional Multiport Memory for Shared Memory in High Performance Parallel Processor System

1996 The Japan Society of Applied Physics
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