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Shuou Nomura
Shuou Nomura
University of Wisconsin-Madison
Computer science
Real-time computing
Parallel computing
Logic gate
Embedded system
5
Papers
271
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Sampling + DMR: practical and low-overhead permanent fault detection
2011
ISCA | International Symposium on Computer Architecture
Shuou Nomura
Matthew D. Sinclair
Chen-Han Ho
Venkatraman Govindaraju
Marc de Kruijf
Karthikeyan Sankaralingam
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Citations (51)
A unified model for timing speculation: Evaluating the impact of technology scaling, CMOS design style, and fault recovery mechanism
2010
DSN | Dependable Systems and Networks
Marc de Kruijf
Shuou Nomura
Karthikeyan Sankaralingam
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Relax: an architectural framework for software recovery of hardware faults
2010
ISCA | International Symposium on Computer Architecture
Marc de Kruijf
Shuou Nomura
Karthikeyan Sankaralingam
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A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation
2010
ITC | International Test Conference
Shuou Nomura
Karthikeyan Sankaralingam
Ranganathan Sankaralingam
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Citations (1)
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