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Jerome Goy
Jerome Goy
STMicroelectronics
Gate oxide
Logic gate
Electronic engineering
Oxide
Computer science
2
Papers
1
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0
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Gate oxide degradation assessment by electrical stress and capacitance measurements
2018
IIRW | International Integrated Reliability Workshop
Dann Morillon
Pascal Masson
F. Julien
Philippe Lorenzini
Jerome Goy
Clément Pribat
O. Gourhant
Thibault Kempf
Jean-Luc Ogier
Alexandre Villaret
Giada Ghezzi
Nathalie Cherault
Stephan Niel
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Study of HTO-based alternative gate oxides for high voltage transistors on advanced eNVM technology
2017
IIRW | International Integrated Reliability Workshop
Dann Morillon
Clément Pribat
Franck Julien
N. Cherault
Jerome Goy
Olivier Gourhant
Jean-Luc Ogier
P. Masson
Giada Ghezzi
Thibault Kempf
Julien Delalleau
Alexandre Villaret
Jean-Christophe Grenier
Stephan Niel
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