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Hsing-Hui Hsu

National Chiao Tung University

28

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149

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Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices

2011 IEEE Transactions on Electron Devices
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Fabrication and characterization of a novel suspended-nanowire-channel thin-film transistor with nanometer air gap

2011 NEMS | Nano/Micro Engineered and Molecular Systems
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Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices

2011 IEEE Transactions on Electron Devices
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Impacts of multiple-gate configuration on characteristics of poly-Si nanowire SONOS devices

2010 VLSIT | Symposium on VLSI Technology
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Trigated Poly-Si Nanowire SONOS Devices for Flat-Panel Applications

2010 IEEE Transactions on Nanotechnology
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Tri-gated poly-Si nanowire SONOS devices

2009 VLSI-TSA | International Symposium on VLSI Technology, Systems, and Applications
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Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping Layer

2009 Japanese Journal of Applied Physics
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Tri-gate poly-Si thin-film transistor with nanowire channels

2008 SNW | IEEE Silicon Nanoelectronics Workshop
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Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device Fluctuations

2008 IEEE Transactions on Electron Devices
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Operations of poly-Si nanowire thin-film transistors with a multiple-gated configuration

2007 Nanotechnology
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