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Masahiko Takeuchi

Renesas Electronics

8

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A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits

2007 IEEE Journal of Solid-state Circuits
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A Large Scale, Flip-Flop RAM imitating a logic LSI for fast development of process technology

2007 ICMTS | International Conference on Microelectronic Test Structures
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A 65-nm SoC embedded 6T-SRAM designed for manufacturability with read and write operation stabilizing circuits

2007 VLSIC | Symposium on VLSI Circuits
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ALargeScale, Flip-Flop RAM imitating alogic LSI forfast development ofprocess technology

2007 International Conference on Microelectronic Test Structures
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A 65 nm SoC Embedded 6T-SRAM Design for Manufacturing with Read and Write Cell Stabilizing Circuits

2006 VLSIC | Symposium on VLSI Circuits
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