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Ryuta Nishino

University of Kitakyushu

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Subblock-Level Matching Layout for Analog Block-Pair and Its Layout-Dependent Manufacturability Evaluation

2016 IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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Subblock-level matching layout for analog block-pair and its manufacturability evaluation

2015 ISCAS | International Symposium on Circuits and Systems
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Block-merge layout of an op-amp pair and its variability evaluation

2014 IEICE technical report. Signal processing
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