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D.S. Yu
D.S. Yu
Peking University
Field-programmable gate array
Parallel computing
System on a chip
Background debug mode interface
Integrated circuit design
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A two-mode debugging system for VLSI designs using Xilinx FPGA
2012
W. C. Li
Z.J. Song
A.W. Ruan
C.Q. Li
D.S. Yu
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