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Girish Patankar
Girish Patankar
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Computer science
Electronic circuit
Artificial neural network
Electronic engineering
Fault coverage
4
Papers
6
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An Improved Test Pattern Reordering Framework Targeting Test Power Reduction
2021
ITC | International Test Conference
Hillol Maity
Santanu Chattopadhyay
Indranil Sengupta
Parthajit Bhattacharya
Girish Patankar
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A New Test Vector Reordering Technique for Low Power Combinational Circuit Testing
2020
Hillol Maity
Kaushik Khatua
Santanu Chattopadhyay
Indranil Sengupta
Girish Patankar
Parthajit Bhattacharya
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Fault Coverage Enhancement via Weighted Random Pattern Generation in BIST Using a DNN-Driven-PSO Approach
2019
CIT | Computer and Information Technology
Hillol Maity
Kaushik Khatua
Santanu Chattopadhyay
Indranil Sengupta
Girish Patankar
Parthajit Bhattacharya
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Citations (2)
A Deep Neural Network Augmented Approach for Fixed Polarity AND-XOR Network Synthesis
2019
TENCON | IEEE Region 10 Conference
Kaushik Khatua
Hillol Maity
Santanu Chattopadhyay
Indranil Sengupta
Girish Patankar
Parthajit Bhattacharya
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Citations (3)
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