Old Web
English
Sign In
Acemap
>
authorDetail
>
Yu-Pin Han
Yu-Pin Han
STMicroelectronics
Gate oxide
Electronic engineering
Application-specific integrated circuit
Static random-access memory
Gate array
4
Papers
7
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Thin Dielectric Quality/Yield Study Using a Constant Voltage Ramp Method
1989
Journal of The Electrochemical Society
Frank Randolph Bryant
Fu-Tai Liou
Yu-Pin Han
John J. Barnes
Show All
Source
Cite
Save
Citations (2)
A 0.8- mu m CMOS technology for high-performance ASIC memory and channelless gate array
1989
IEEE Journal of Solid-state Circuits
Fu-Tai Liou
Yu-Pin Han
Frank Randolph Bryant
Mehdi Zamanian
Show All
Source
Cite
Save
Citations (5)
Formation of self-aligned source/drain contact in mos transistor
1989
Tsiu C Chan
Yu-Pin Han
Show All
Source
Cite
Save
Citations (0)
A 0.8 mu m CMOS technology for high performance ASIC memory and channelless gate array
1988
CICC | Custom Integrated Circuits Conference
Fu-Tai Liou
Yu-Pin Han
Frank Randolph Bryant
R.O. Miller
S.W. Chiu
L. Eng
C.R. Spinner
M. Zamanian
G. Klein
J. Barnes
Show All
Source
Cite
Save
Citations (0)
1