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Peter F. Lai
Peter F. Lai
Computer science
Thread (computing)
Multithreading
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Parallel computing
4
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27
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Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor
2009
IEEE Journal of Solid-state Circuits
Georgios K. Konstadinidis
Marc Tremblay
Shailender Chaudhry
Mamun Rashid
Peter F. Lai
Yukio Otaguro
Yannis Orginos
Sudhendra Parampalli
Mark Steigerwald
Shriram Gundala
Rambabu Pyapali
Leonard D. Rarick
Ilyas Elkin
Yuefei Ge
Ishwar Parulkar
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Citations (17)
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor
2009
ISSCC | International Solid-State Circuits Conference
Georgios K. Konstadinidis
Marc Tremblay
Shailender Chaudhry
Mamun Rashid
Peter F. Lai
Y. Otaguro
Y. Orginos
S. Parampalli
M. Steigerwald
S. Gundala
Rambabu Pyapali
Leonard D. Rarick
Ilyas Elkin
Yuefei Ge
I. Parulkar
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Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor
2009
ISSCC | International Solid-State Circuits Conference
Georgios K. Konstadinidis
Marc Tremblay
Shailender Chaudhry
Mamun Rashid
Peter F. Lai
Yukio Otaguro
Yannis Orginos
Sudhendra Parampalli
Mark Steigerwald
Shriram Gundala
Rambabu Pyapali
Leonard D. Rarick
Ilyas Elkin
Yuefei Ge
Ishwar Parulkar
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Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor
2008
ISSCC | International Solid-State Circuits Conference
Georgios K. Konstadinidis
Mamun Rashid
Peter F. Lai
Yukio Otaguro
Yannis Orginos
Sudhendra Parampalli
Mark Steigerwald
Shriram Gundala
Rambabu Pyapali
Leonard Rarick
Ilyas Elkin
Yuefei Ge
Ishwar Parulkar
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Citations (10)
1