Old Web
English
Sign In
Acemap
>
authorDetail
>
Bernd-Ulrich Klepser
Bernd-Ulrich Klepser
Intel
Electronic engineering
Electrical engineering
Computer science
CMOS
Phase-locked loop
7
Papers
77
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS
2016
IEEE Journal of Solid-state Circuits
Sebastian Sievert
Ofir Degani
Assaf Ben Bassat
Rotem Banin
Ashoke Ravi
Wolfgang Thomann
Bernd-Ulrich Klepser
Zdravko Boos
Doris Schmitt-Landsiedel
Show All
Source
Cite
Save
Citations (32)
2.9 A 2GHz 244fs-resolution 1.2ps-Peak-INL edge-interpolator-based digital-to-time converter in 28nm CMOS
2016
ISSCC | International Solid-State Circuits Conference
Sebastian Sievert
Ofir Degani
Assaf Ben Bassat
Rotem Banin
Ashoke Ravi
Bernd-Ulrich Klepser
Zdravko Boos
Doris Schmitt-Landsiedel
Show All
Source
Cite
Save
Citations (7)
Power saving technology for digital-time converter
2014
Paolo Madoglio
Bernd-Ulrich Klepser
Michael Bruennert
Georgios Palaskas
Andreas Menkhoff
Andreas Boehme
Zdravko Boos
Show All
Source
Cite
Save
Citations (0)
A 5.7 GHz Hiperlan SiGe BiCMOS voltage-controlled oscillator and phase-locked-loop frequency synthesizer
2001
RFIC | Radio Frequency Integrated Circuits Symposium
Bernd-Ulrich Klepser
Markus Scholz
Jakub Kučera
Show All
Source
Cite
Save
Citations (11)
1