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F. La Rosa
F. La Rosa
STMicroelectronics
Electronic engineering
Memory cell
Engineering
Non-volatile memory
Architecture
4
Papers
8
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0
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40nm embedded Select in Trench Memory (eSTM) Technology Overview
2019
IMW | International Memory Workshop
F. La Rosa
Stephan Niel
Arnaud Regnier
Francois Maugain
Marc Mantelli
Antonino Conte
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Citations (3)
Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip
2018
IRPS | International Reliability Physics Symposium
Thibault Kempf
V. Della Marca
L. Baron
Francois Maugain
F. La Rosa
Stephan Niel
Arnaud Regnier
Jean Michel Portal
P. Masson
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Embedded Select in Trench Memory (eSTM), best in class 40nm floating gate based cell: a process integration challenge
2018
IEDM | International Electron Devices Meeting
Stephan Niel
F. La Rosa
Arnaud Regnier
Marc Mantelli
F. Trenteseaux
G. Ghezzi
A. Marzaki
Q. Hubert
Julien Delalleau
T. Cabout
Francois Maugain
E. Lepape
L. Baron
A. Champenois
Darren. Galpin
N. Cherault
S. Audran
L. Parmigiani
P. Gouraud
B. Duclaux
Y. Escarabajal
F. Baudin
E. Beche
B. Saidi
V. Arnal
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Citations (4)
A new non-volatile memory cell based on the flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window)
2014
CAS | International Semiconductor Conference
J. Bartoli
V. Della Marca
Julien Delalleau
Arnaud Regnier
Stephan Niel
F. La Rosa
J. Postel-Pellerin
F. Lalande
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Citations (1)
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