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Ying Cao

Xilinx

5

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A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET

2021 VLSIC | Symposium on VLSI Circuits
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6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET

2020 ISSCC | International Solid-State Circuits Conference
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A 2.488---11.2 Gb/s SerDes in 40 nm low-leakage CMOS with multi-protocol compatibility for FPGA applications

2014 Analog Integrated Circuits and Signal Processing
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