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Seoung-Ju Chung
Seoung-Ju Chung
SK Hynix
Electronic engineering
Dram
Electrical engineering
Engineering
Z-RAM
4
Papers
71
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23.5 A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture
2017
ISSCC | International Solid-State Circuits Conference
Kwang-Myoung Rho
Kenji Tsuchida
Dong-Keun Kim
Yutaka Shirai
Jihyae Bae
Tsuneo Inaba
Hiromi Noro
Hyunin Moon
Sung-Woong Chung
Kazumasa Sunouchi
Jin Won Park
Ki-Seon Park
Akihito Yamamoto
Seoung-Ju Chung
Hyeongon Kim
Hisato Oyamatsu
Jonghoon Oh
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Citations (41)
Vertical double gate Z-RAM technology with remarkable low voltage operation for DRAM application
2010
VLSIT | Symposium on VLSI Technology
Joong-Sik Kim
Sung-Woong Chung
Tae-Su Jang
Seung Hwan Lee
Donghee Son
Seoung-Ju Chung
Sang-Min Hwang
Srinivasa Banna
Sunil Bhardwaj
Mayank Gupta
Jungtae Kwon
David Kim
Greg Popov
Venkatesh P. Gopinath
Michael A. Van Buskirk
Sang Hoon Cho
Jae Sung Roh
Sung Joo Hong
Sung Wook Park
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Citations (10)
Effect of Nitrogen Implantation on characteristics of gate oxide
1999
Seoung-Ju Chung
Gae-Dal Kwack
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