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B. Vineeth
B. Vineeth
Anna University
Parallel computing
Field-programmable gate array
Signal processing
Multiplexer
Digital filter
2
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FPGA realisation of multiplierless FIR filter architectures
2015
ICSP | International Conference on Signal Processing
J. Britto Pari
Joy Vasantha Rani S.P
A. Selestin Soundarya
B. Vineeth
P. Vijayakumar
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Citations (3)
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