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Pierre Bisiaux
Pierre Bisiaux
University College Dublin
Optoelectronics
FPGA prototype
Phase-locked loop
Electronic engineering
Synchronization
3
Papers
4
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0
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Cryogenic Low-Drop-Out Regulators Fully Integrated with Quantum Dot Array in 22-nm FD-SOI CMOS
2021
IMS | International Microwave Symposium
Dennis Andrade-Miceli
Ali Esmailiyan
Pierre Bisiaux
Elena Blokhina
Teerachot Siriburanon
Imran Bashir
Mike Asker
Dirk Leipold
R. Bogdan Staszewski
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Design of a 1.5 GHz Low jitter DCO Ring in 28 nm CMOS Process
2020
ECCTD | European Conference on Circuit Theory and Design
Pierre Bisiaux
Elena Blokhina
Eugene Koskin
Teerachot Siriburanon
Dimitri Galayko
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All-Digital Phase-Locked Loop Arrays: Investigation of Synchronisation and Jitter Performance through FPGA Prototyping
2019
NEWCAS | International New Circuits and Systems Conference
Eugene Koskin
Pierre Bisiaux
Dimitri Galayko
Elena Blokhina
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Citations (3)
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