Old Web
English
Sign In
Acemap
>
authorDetail
>
J. Idebuchi
J. Idebuchi
Electronic engineering
Doping
Epitaxy
MOSFET
Optoelectronics
4
Papers
16
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Scalable eSiGe S/D Technology with Less Layout Dependence for 45-nm Generation
2006
VLSIT | Symposium on VLSI Technology
K. Ota
T. Sanuki
K. Yahashi
Yuki Miyanami
K. Matsuo
J. Idebuchi
M. Moriya
K. Nakayama
R. Yamaguchi
Hiroyasu Tanaka
T. Yamazaki
S. Terauchi
A. Horiuchi
S. Fujita
Ichiro Mizushima
H. Yamasaki
Kojiro Nagaoka
A. Oishi
Y. Takegawa
K. Ohno
Makoto Iwai
M. Saito
F. Matsuoka
N. Nagashima
Show All
Source
Cite
Save
Citations (7)
Application of HfSiON to Deep Trench Capacitors of Sub-45nm Node Embedded DRAM
2005
The Japan Society of Applied Physics
Takashi Ando
Naoyuki Sato
Susumu Hiyama
Tomoyuki Hirano
Kojiro Nagaoka
Hitoshi Abe
Atsushi Okuyama
Hajime Ugajin
Kaori Tai
Shigeru Fujita
Koji Watanabe
Ryota Katsumata
J. Idebuchi
Takashi Suzuki
Toshiaki Hasegawa
Hayato Iwamoto
Shingo Kadomura
Show All
Source
Cite
Save
Citations (0)
New stress inducing technique of epitaxial si on recessed S/D fabricated in substrate strained-si of [100]channel on rotated wafers
2005
IEDM | International Electron Devices Meeting
T. Sanuki
Hiroyasu Tanaka
K. Oota
O. Fujii
R. Yamaguchi
K. Nakayama
Y. Morimasa
Y. Takasu
J. Idebuchi
N. Nishiyama
Hironobu Fukui
H. Yoshimura
K. Matsuo
Ichiro Mizushima
H. Ito
Y. Takegawa
M. Saito
Makoto Iwai
N. Nagashima
F. Matsuoka
Show All
Source
Cite
Save
Citations (0)
Fin-Array-FET on bulk silicon for sub-100 nm trench capacitor DRAM
2003
VLSIT | Symposium on VLSI Technology
Ryota Katsumata
N. Tsuda
J. Idebuchi
Masaki Kondo
N. Aoki
S. Ito
Katsunori Yahashi
T. Satonaka
Mutsuo Morikado
Masaru Kito
M. Kido
T Tanaka
Hideaki Aochi
Takeshi Hamamoto
Show All
Source
Cite
Save
Citations (9)
1