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Yuangang Wang

University of Electronic Science and Technology of China

9

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168

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Lateral Source-Field-Plated β-Ga2O3 MOSFET with Recorded Breakdown Voltage of 2360 V and Low Specific On-Resistance of 560 mΩ•cm2

2019 Semiconductor Science and Technology
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Modeling and Simulation of A Microchannel Cooling System for Vitrification of Cells and Tissues.

2018 Cryo letters
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A novel high voltage SOI LDMOS with Buried N-layer in a self-isolation high voltage integrated circuit

2010 ISPSD | International Symposium on Power Semiconductor Devices and IC's
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Partial SOI Power LDMOS With a Variable Low- $k$ Dielectric Buried Layer and a Buried P Layer

2010 IEEE Electron Device Letters
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Partial SOI power LDMOS with a variable low-k dielectric buried layer and a buried p-layer

2010 ICSICT | IEEE International Conference on Solid-State and Integrated Circuit Technology
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Citations (9)